Publications

Found 7 results
Search results for Y.W. Lin OR "Qiu"  [Reset Search]
2011
Yi-Wei Lin, M. Marek-Sadowska, and W. Maly, “On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 30, p. 229 -241, 2011.
W. Maly, et al., “Twin gate, vertical slit FET (VeSFET) for highly periodic layout and 3D integration”, in Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference, 2011, p. 145 -150.
2010
Yi-Wei Lin, M. Marek-Sadowska, and W. Maly, “Layout Generator for Transistor-Level High-Density Regular Circuits”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 29, p. 197 -210, 2010.
Yi-Wei Lin, M. Marek-Sadowska, and W. Maly, “Performance study of VeSFET-based, high-density regular circuits”, in ISPD '10: Proceedings of the 19th international symposium on Physical design, 2010, p. 161–168.
2009
Yi-Wei Lin, M. Marek-Sadowska, and W. Maly, “Transistor-level layout of high-density regular circuits”, in ISPD '09: Proceedings of the 2009 international symposium on Physical design, 2009, p. 83–90.
2008
Yi-Wei Lin, M. Marek-Sadowska, W. Maly, A. Pfitzner, and D. Kasprowicz, “Is there always performance overhead for regular fabric?”, in Computer Design, 2008. ICCD 2008. IEEE International Conference on, 2008, p. 557 -562.
2007
W. Maly, Yi-Wei Lin, and M. Marek-Sadowska, “OPC-Free and Minimally Irregular IC Design Style”, in Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE, 2007, p. 954 -957.