Publications

Found 5 results
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2009
V. Mehta, M. Marek-Sadowska, K. - H. Tsai, and J. Rajski, “Timing-Aware Multiple-Delay-Fault Diagnosis”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 28, p. 245 -258, 2009.
2008
V. Mehta, M. Marek-Sadowska, K. - H. Tsai, and J. Rajski, “Improving the Resolution of Single-Delay-Fault Diagnosis”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 27, p. 932 -945, 2008.
V. Mehta, M. Marek-Sadowska, K. - H. Tsai, and J. Rajski, “Timing-Aware Multiple-Delay-Fault Diagnosis”, in Quality Electronic Design, 2008. ISQED 2008. 9th International Symposium on, 2008, p. 246 -253.
2006
V. Mehta, Z. Wang, M. Marek-Sadowska, K. - H. Tsai, and J. Rajski, “Delay fault diagnosis for nonrobust test”, in Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on, 2006, p. 8 pp. -472.
V. Mehta, M. Marek-Sadowska, K. - H. Tsai, and J. Rajski, “Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology”, in Test Conference, 2006. ITC '06. IEEE International, 2006, p. 1-10.