- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Metrics for characterizing machine learning-based hotspot detection methods
- A study on cell-level routing for VeSFET circuits
- On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
Detecting context sensitive hot spots in standard cell libraries
Title | Detecting context sensitive hot spots in standard cell libraries |
Publication Type | Conference Paper |
Year of Publication | 2009 |
Authors | Wuu, J-Y, Pikus, FG, Torres, A, Marek-Sadowska, M, Singh, VK, Rieger, ML |
Conference Name | Design for Manufacturability through Design-Process Integration III |
Publisher | SPIE |
URL | http://link.aip.org/link/?PSI/7275/727515/1 |
DOI | 10.1117/12.814316 |