Publications

Found 2 results
Filters: Keyword is MOS integrated circuits and Author is Malgorzata Marek-Sadowska  [Clear All Filters]
Journal Article
L. H. Chen, Marek-Sadowska, M., and Brewer, F., Buffer delay change in the presence of power and ground noise, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 11, pp. 461 -473, 2003.
Conference Paper
W. Maly, Singh, N., Chen, Z., Shen, N., Li, X., Pfitzner, A., Kasprowicz, D., Kuzmicz, W., Yi-Wei Lin, and Marek-Sadowska, M., Twin gate, vertical slit FET (VeSFET) for highly periodic layout and 3D integration, in Mixed Design of Integrated Circuits and Systems (MIXDES), 2011 Proceedings of the 18th International Conference, 2011, pp. 145 -150.