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C. - C. Lin and Marek-Sadowska, M., “On designing universal logic blocks and their application to FPGA design”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 16, pp. 519 -527, 1997.
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C. - C. Lin, Chang, D., Wu, Y. - L., and Marek-Sadowska, M., “Time-multiplexed routing resources for FPGA design”, in Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996, 1996, pp. 152 -155.