Publications

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Filters: Keyword is circuit layout CAD and Author is Parthasarathy, G.  [Clear All Filters]
Conference Paper
A. Singh, Parthasarathy, G., and Marek-Sadowska, M., Interconnect resource-aware placement for hierarchical FPGAs, in Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on, 2001, pp. 132 -136.