Publications
Found 3 results
Filters: Keyword is logic CAD and Author is Chien-Chung Tsai [Clear All Filters]
“Boolean functions classification via fixed polarity Reed-Muller forms”, Computers, IEEE Transactions on, vol. 46, pp. 173 -186, 1997.
, “Multilevel logic synthesis for arithmetic functions”, in Design Automation Conference Proceedings 1996, 33rd, 1996, pp. 242 -247.
, “Efficient minimization algorithms for fixed polarity AND/XOR canonical networks”, in VLSI, 1993. 'Design Automation of High Performance VLSI Systems', Proceedings., Third Great Lakes Symposium on, 1993, pp. 76 -79.
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