Publications

Found 2 results
Filters: Keyword is logic CAD and Author is Kai Wang  [Clear All Filters]
Conference Paper
C. - W. Chang, Wang, K., and Marek-Sadowska, M., “Layout-driven hot-carrier degradation minimization using logic restructuring techniques”, in Design Automation Conference, 2001. Proceedings, 2001, pp. 97 - 102.
A. Mukherjee, Wang, K., Chen, L. H., and Marek-Sadowska, M., “Sizing power/ground meshes for clocking and computing circuit components”, in Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings, 2002, pp. 176 -183.