Publications

Found 21 results
Filters: Keyword is crosstalk and Author is Malgorzata Marek-Sadowska  [Clear All Filters]
2006
V. Mehta, Marek-Sadowska, M., Tsai, K. - H., and Rajski, J., “Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology”, in Test Conference, 2006. ITC '06. IEEE International, 2006, pp. 1-10.
2005
Y. Ran, Kondratyev, A., Tseng, K., Watanabe, Y., and Marek-Sadowska, M., “Eliminating false positives in crosstalk noise analysis”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 1406 - 1419, 2005.
2004
Y. Ran, Kondratyev, A., Watanabe, Y., and Marek-Sadowska, M., “Eliminating false positives in crosstalk noise analysis”, in Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, 2004, vol. 2, pp. 1192 - 1197 Vol.2.
2003
Y. Ran and Marek-Sadowska, M., “Crosstalk noise in FPGAs”, in Design Automation Conference, 2003. Proceedings, 2003, pp. 944 - 949.
M. - F. Hsiao, Marek-Sadowska, M., and Chen, S. - J., “Minimizing inter-clock coupling jitter”, in Quality Electronic Design, 2003. Proceedings. Fourth International Symposium on, 2003, pp. 333 - 338.
C. - K. Tsai and Marek-Sadowska, M., “Modeling crosstalk induced delay”, in Quality Electronic Design, 2003. Proceedings. Fourth International Symposium on, 2003, pp. 189 - 194.
D. Chai, Kondratyev, A., Ran, Y., Tseng, K., Watanabe, Y., and Marek-Sadowska, M., “Temporofunctional crosstalk noise analysis”, in Design Automation Conference, 2003. Proceedings, 2003, pp. 860 - 863.
2002
L. H. Chen and Marek-Sadowska, M., “Closed-form crosstalk noise metrics for physical design applications”, in Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings, 2002, pp. 812 - 819.
M. - F. Hsiao, Marek-Sadowska, M., and Chen, S. - J., “Crosstalk minimization for multiple clock tree routing”, in Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on, 2002, vol. 1, pp. I - 152-5 vol.1.
L. H. Chen and Marek-Sadowska, M., “Efficient closed-form crosstalk delay metrics”, in Quality Electronic Design, 2002. Proceedings. International Symposium on, 2002, pp. 431 - 436.
2001
L. H. Chen and Marek-Sadowska, M., “Aggressor alignment for worst-case crosstalk noise”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 20, pp. 612 -621, 2001.
T. Xiao and Marek-Sadowska, M., “Functional correlation analysis in crosstalk induced critical paths identification”, in Design Automation Conference, 2001. Proceedings, 2001, pp. 653 - 656.
T. Xiao and Marek-Sadowska, M., “Gate sizing to eliminate crosstalk induced timing violation”, in Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on, 2001, pp. 186 -191.
2000
L. H. Chen, Marek-Sadowska, M., Divecha, R., and Singh, P., “Capturing input switching dependency in crosstalk noise modeling”, in ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 2000, pp. 330 -334.
T. Xiao and Marek-Sadowska, M., “Efficient delay calculation in presence of crosstalk”, in Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on, 2000, pp. 491 -497.
T. Xiao, Chang, C. - W., and Marek-Sadowska, M., “Efficient static timing analysis in presence of crosstalk”, in ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 2000, pp. 335 -339.
T. Xiao and Marek-Sadowska, M., “Worst delay estimation in crosstalk aware static timing analysis”, in Computer Design, 2000. Proceedings. 2000 International Conference on, 2000, pp. 115 -120.
1999
A. Vittal, Chen, L. H., Marek-Sadowska, M., Wang, K. - P., and Yang, S., “Crosstalk in VLSI interconnections”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 18, pp. 1817 -1824, 1999.
T. Xiao and Marek-Sadowska, M., “Crosstalk reduction by transistor sizing”, in Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific, 1999, pp. 137 -140 vol.1.
A. Vittal, Chen, L. H., Marek-Sadowska, M., Wang, K. - P., and Yang, S., “Modeling crosstalk in resistive VLSI interconnections”, in VLSI Design, 1999. Proceedings. Twelfth International Conference On, 1999, pp. 470 -475.
1997
A. Vittal and Marek-Sadowska, M., “Crosstalk reduction for VLSI”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 16, pp. 290 -298, 1997.