Publications

Found 1 results
Filters: Keyword is circuit optimisation and Author is Arindam Mukherjee  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
M
A. Mukherjee, Wang, K., Chen, L. H., and Marek-Sadowska, M., Sizing power/ground meshes for clocking and computing circuit components, in Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings, 2002, pp. 176 -183.