Publications

Found 2 results
Filters: Keyword is integrated circuit modelling and Author is Bo Hu  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
C
B. Hu and Marek-Sadowska, M., “Congestion minimization during placement without estimation”, in Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on, 2002, pp. 739 - 745.
I
Q. Liu, Hu, B., and Marek-Sadowska, M., “Individual wire-length prediction with application to timing-driven placement”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 12, pp. 1004 -1014, 2004.