Publications

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D. I. Cheng, Lin, C. - C., and Marek-Sadowska, M., “Circuit partitioning with logic perturbation”, in Computer-Aided Design, 1995. ICCAD-95. Digest of Technical Papers., 1995 IEEE/ACM International Conference on, 1995, pp. 650 -655.
M. Marek-Sadowska and Sarrafzadeh, M., “The crossing distribution problem [IC layout]”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 14, pp. 423 -433, 1995.
M. - F. Hsiao, Marek-Sadowska, M., and Chen, S. - J., “A crosstalk aware two-pin net router”, in Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on, 2003, vol. 5, p. V-485 - V-488 vol.5.
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B. Hu and Marek-Sadowska, M., “Fine granularity clustering-based placement”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 23, pp. 527 - 536, 2004.
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Y. - L. Wu, Tsukiyama, S., and Marek-Sadowska, M., “Graph based analysis of 2-D FPGA routing”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 15, pp. 33 -44, 1996.
Y. - L. Wu and Marek-Sadowska, M., “Graph based analysis of FPGA routing”, in Design Automation Conference, 1993, with EURO-VHDL '93. Proceedings EURO-DAC '93. European, 1993, pp. 104 -109.
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M. Marek-Sadowska and Lin, S., “Timing driven placement”, in Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on, 1989, pp. 94 -97.