Publications
Found 2 results
Filters: Keyword is timing driven placement and Author is Chao-Yang Yeh [Clear All Filters]
, “Sequential delay budgeting with interconnect prediction”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 12, pp. 1028 -1037, 2004.
, “Minimum-area sequential budgeting for FPGA”, in Computer Aided Design, 2003. ICCAD-2003. International Conference on, 2003, pp. 813 - 817.
