Publications

Found 2 results
Filters: Keyword is integrated circuit interconnections and Author is Wojciech Maly  [Clear All Filters]
2010
Yi-Wei Lin, Marek-Sadowska, M., and Maly, W., Layout Generator for Transistor-Level High-Density Regular Circuits, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 29, pp. 197 -210, 2010.
2008
Yi-Wei Lin, Marek-Sadowska, M., Maly, W., Pfitzner, A., and Kasprowicz, D., Is there always performance overhead for regular fabric?, in Computer Design, 2008. ICCD 2008. IEEE International Conference on, 2008, pp. 557 -562.