Publications
Found 2 results
Filters: Keyword is integrated circuit interconnections and Author is Wojciech Maly [Clear All Filters]
“Layout Generator for Transistor-Level High-Density Regular Circuits”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 29, pp. 197 -210, 2010.
, “Is there always performance overhead for regular fabric?”, in Computer Design, 2008. ICCD 2008. IEEE International Conference on, 2008, pp. 557 -562.
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