Publications

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Filters: Keyword is integrated circuit layout and Author is Hailin Jiang  [Clear All Filters]
2007
H. Jiang and Marek-Sadowska, M., “Power-Gating Aware Floorplanning”, in Quality Electronic Design, 2007. ISQED '07. 8th International Symposium on, 2007, pp. 853 -860.