Publications

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B. Hu and Marek-Sadowska, M., Multilevel fixed-point-addition-based VLSI placement, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 1188 - 1203, 2005.
B. Hu and Marek-Sadowska, M., Multilevel expansion-based VLSI placement with blockages, in Computer Aided Design, 2004. ICCAD-2004. IEEE/ACM International Conference on, 2004, pp. 558-564.