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X. Qiu and Marek-Sadowska, M., Can pin access limit the footprint scaling?, in Proceedings of the 49th Annual Design Automation Conference, 2012, pp. 1100–1106.
Yi-Wei Lin, Marek-Sadowska, M., and Maly, W., On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 30, pp. 229 -241, 2011.
Yi-Wei Lin, Marek-Sadowska, M., Maly, W., Pfitzner, A., and Kasprowicz, D., Is there always performance overhead for regular fabric?, in Computer Design, 2008. ICCD 2008. IEEE International Conference on, 2008, pp. 557 -562.