Publications

Found 29 results
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C
A. Vittal, Ha, H., Brewer, F., and Marek-Sadowska, M., Clock skew optimization for ground bounce control, in Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on, 1996, pp. 395 -399.
S. - C. Chang, Van Ginneken, L. P. P. P., and Marek-Sadowska, M., Circuit optimization by rewiring, Computers, IEEE Transactions on, vol. 48, pp. 962 -970, 1999.
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L. H. Chen, Marek-Sadowska, M., and Brewer, F., Buffer delay change in the presence of power and ground noise, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 11, pp. 461 -473, 2003.
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C. - W. Chang and Marek-Sadowska, M., ATPG-based logic synthesis: an overview, in Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on, 2002, pp. 786 - 789.

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