Publications

Found 28 results
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Journal Article
K. - H. Tsai, Rajski, J., and Marek-Sadowska, M., Star test: the theory and its applications, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 19, pp. 1052 -1064, 2000.
V. Mehta, Marek-Sadowska, M., Tsai, K. - H., and Rajski, J., Timing-Aware Multiple-Delay-Fault Diagnosis, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 28, pp. 245 -258, 2009.
Y. Ran and Marek-Sadowska, M., Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 14, pp. 998 -1009, 2006.

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