Publications

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C. - W. Chang, Hsiao, M. - F., and Marek-Sadowska, M., “A new reasoning scheme for efficient redundancy addition and removal”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 22, pp. 945 - 951, 2003.
S. - C. Chang and Marek-Sadowska, M., “Technology mapping via transformations of function graphs”, in Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings., IEEE 1992 International Conference on, 1992, pp. 159 -162.
S. - C. Chang and Marek-Sadowska, M., “Perturb And Simplify: Multi-level Boolean Network Optimizer”, in Computer-Aided Design, 1994., IEEE/ACM International Conference on, 1994, pp. 2 -5.
S. - C. Chang, Van Ginneken, L. P. P. P., and Marek-Sadowska, M., “Circuit optimization by rewiring”, Computers, IEEE Transactions on, vol. 48, pp. 962 -970, 1999.
S. - C. Chang, Van Ginneken, L. P. P. P., and Marek-Sadowska, M., “Fast Boolean optimization by rewiring”, in Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on, 1996, pp. 262 -269.
D. Chai, Kondratyev, A., Ran, Y., Tseng, K., Watanabe, Y., and Marek-Sadowska, M., “Temporofunctional crosstalk noise analysis”, in Design Automation Conference, 2003. Proceedings, 2003, pp. 860 - 863.

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