Publications

Found 4 results
Filters: First Letter Of Last Name is N  [Clear All Filters]
A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 
N
V. S. Nandakumar and Marek-Sadowska, M., A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures, Emerging and Selected Topics in Circuits and Systems, IEEE Journal on, vol. 2, pp. 266 -277, 2012.
V. S. Nandakumar, Newmark, D., Zhan, Y., and Marek-Sadowska, M., Statistical static timing analysis flow for transistor level macros in a microprocessor, in Quality Electronic Design (ISQED), 2010 11th International Symposium on, 2010, pp. 163 -170.
V. S. Nandakumar and Marek-Sadowska, M., Layout effects in fine grain 3D integrated regular microprocessor blocks, in Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE, 2011, pp. 639 -644.
V. S. Nandakumar and Marek-Sadowska, M., Low power, high throughput network-on-chip fabric for 3D multicore processors, in Computer Design (ICCD), 2011 IEEE 29th International Conference on, 2011, pp. 453 -454.