Publications

Found 10 results
Filters: First Letter Of Last Name is V  [Clear All Filters]
1994
A. Vittal and Marek-Sadowska, M., “Minimal Delay Interconnect Design Using Alphabetic Trees”, in Design Automation, 1994. 31st Conference on, 1994, pp. 392 - 396.
1995
A. Vittal and Marek-Sadowska, M., “Power Distribution Topology Design”, in Design Automation, 1995. DAC '95. 32nd Conference on, 1995, pp. 503 -507.
A. Vittal and Marek-Sadowska, M., “Power Optimal Buffered Clock Tree Design”, in Design Automation, 1995. DAC '95. 32nd Conference on, 1995, pp. 497 -502.
1996
A. Vittal, Ha, H., Brewer, F., and Marek-Sadowska, M., “Clock skew optimization for ground bounce control”, in Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on, 1996, pp. 395 -399.
S. - C. Chang, Van Ginneken, L. P. P. P., and Marek-Sadowska, M., “Fast Boolean optimization by rewiring”, in Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on, 1996, pp. 262 -269.
1997
A. Vittal and Marek-Sadowska, M., “Crosstalk reduction for VLSI”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 16, pp. 290 -298, 1997.
A. Vittal and Marek-Sadowska, M., “Low-power buffered clock tree design”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 16, pp. 965 -975, 1997.
1999
S. - C. Chang, Van Ginneken, L. P. P. P., and Marek-Sadowska, M., “Circuit optimization by rewiring”, Computers, IEEE Transactions on, vol. 48, pp. 962 -970, 1999.
A. Vittal, Chen, L. H., Marek-Sadowska, M., Wang, K. - P., and Yang, S., “Crosstalk in VLSI interconnections”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 18, pp. 1817 -1824, 1999.
A. Vittal, Chen, L. H., Marek-Sadowska, M., Wang, K. - P., and Yang, S., “Modeling crosstalk in resistive VLSI interconnections”, in VLSI Design, 1999. Proceedings. Twelfth International Conference On, 1999, pp. 470 -475.