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C. - C. Lin, Marek-Sadowska, M., and Gatlin, D., Universal Logic Gate For Fpga Design, in Computer-Aided Design, 1994., IEEE/ACM International Conference on, 1994, pp. 164 -168.
M. Marek-Sadowska, An Unconstrained Topological Via Minimization Problem for Two-Layer Routing, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 3, pp. 184 - 190, 1984.