Publications

Found 5 results
Filters: Author is Shih-Chieh Chang and First Letter Of Title is P  [Clear All Filters]
2011
Y. - S. Su, Wang, D. - C., Chang, S. - C., and Marek-Sadowska, M., “Performance Optimization Using Variable-Latency Design Style”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 19, pp. 1874 -1883, 2011.
1997
S. - C. Chang, Cheng, K. - T., Woo, N. - S., and Marek-Sadowska, M., “Postlayout logic restructuring using alternative wires”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 16, pp. 587 -596, 1997.
1996
S. - C. Chang, Marek-Sadowska, M., and Cheng, K. - T., “Perturb and simplify: multilevel Boolean network optimizer”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 15, pp. 1494 -1504, 1996.
S. - C. Chang and Marek-Sadowska, M., “Perturb and simplify: optimizing circuits with external don't cares”, in European Design and Test Conference, 1996. ED TC 96. Proceedings, 1996, pp. 402 -406.
1994
S. - C. Chang and Marek-Sadowska, M., “Perturb And Simplify: Multi-level Boolean Network Optimizer”, in Computer-Aided Design, 1994., IEEE/ACM International Conference on, 1994, pp. 2 -5.