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T. Xiao and Marek-Sadowska, M., “Gate sizing to eliminate crosstalk induced timing violation”, in Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on, 2001, pp. 186 -191.
T. Xiao and Marek-Sadowska, M., “Functional correlation analysis in crosstalk induced critical paths identification”, in Design Automation Conference, 2001. Proceedings, 2001, pp. 653 - 656.
T. Xiao and Marek-Sadowska, M., “Efficient delay calculation in presence of crosstalk”, in Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on, 2000, pp. 491 -497.
T. Xiao, Chang, C. - W., and Marek-Sadowska, M., “Efficient static timing analysis in presence of crosstalk”, in ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 2000, pp. 335 -339.
T. Xiao and Marek-Sadowska, M., “Worst delay estimation in crosstalk aware static timing analysis”, in Computer Design, 2000. Proceedings. 2000 International Conference on, 2000, pp. 115 -120.
T. Xiao and Marek-Sadowska, M., “Crosstalk reduction by transistor sizing”, in Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific, 1999, pp. 137 -140 vol.1.