Efficient static timing analysis in presence of crosstalk

TitleEfficient static timing analysis in presence of crosstalk
Publication TypeConference Paper
Year of Publication2000
AuthorsXiao, T, Chang, C-W, Marek-Sadowska, M
Conference NameASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International
Keywordscrosstalk, delay fault testing, delays, fault diagnosis, functional irredundant path sensitization criteria, IC testing, integrated circuit testing, iterative methods, iterative updating, logic testing, mutually capacitively coupled signals, static timing analysis, timing, timing windows
AbstractIn this paper we show that iterative updating of timing windows is necessary when signals on the same path are mutually capacitively coupled. To improve the accuracy of timing analysis we use implications induced by functional irredundant path sensitization criteria. Experimental results have demonstrated the efficacy and efficiency of our proposed techniques