| Title | A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures |
| Publication Type | Journal Article |
| Year of Publication | 2012 |
| Authors | Nandakumar, VS, Marek-Sadowska, M |
| Journal | Emerging and Selected Topics in Circuits and Systems, IEEE Journal on |
| Volume | 2 |
| Pagination | 266 -277 |
| Date Published | june |
| ISSN | 2156-3357 |
| Keywords | 3D hybrid architecture, 3D multicore architectures, complementary metal-oxide-semiconductor-based homogeneous 3D NoC, energy consumption, field effect transistors, latency, low energy network-on-chip fabric, multiprocessing systems, network-on-chip, NoC, power aware computing, power saving techniques, vertical slit field effect transistors, VeSFET circuits |
| DOI | 10.1109/JETCAS.2012.2193834 |
