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  • Can pin access limit the footprint scaling?
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Vertical Slit Field Effect Transistor in ultra-low power applications

TitleVertical Slit Field Effect Transistor in ultra-low power applications
Publication TypeConference Paper
Year of Publication2012
AuthorsQiu, X, Marek-Sadowska, M, Maly, W
Conference NameQuality Electronic Design (ISQED), 2012 13th International Symposium on
Date Publishedmarch
DOI10.1109/ISQED.2012.6187522
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Electrical and Computer Engineering, Harold Frank Hall, University of California, Santa Barbara, CA - 93106.

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