Publications

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Filters: Keyword is fast design mappability estimation and Author is Yajun Ran  [Clear All Filters]
2006
Y. Ran and Marek-Sadowska, M., Via-Configurable Routing Architectures and Fast Design Mappability Estimation for Regular Fabrics, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 14, pp. 998 -1009, 2006.