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V. S. Nandakumar and Marek-Sadowska, M., A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures, Emerging and Selected Topics in Circuits and Systems, IEEE Journal on, vol. 2, pp. 266 -277, 2012.
Yi-Wei Lin, Marek-Sadowska, M., and Maly, W., On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 30, pp. 229 -241, 2011.