Publications
Found 29 results
Filters: Keyword is circuit optimisation and Author is Malgorzata Marek-Sadowska [Clear All Filters]
“A new reasoning scheme for efficient redundancy addition and removal”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 22, pp. 945 - 951, 2003.
, “On-chip power-supply network optimization using multigrid-based technique”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 407 - 417, 2005.
, “Perturb and simplify: multilevel Boolean network optimizer”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 15, pp. 1494 -1504, 1996.
, “Sequential delay budgeting with interconnect prediction”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 12, pp. 1028 -1037, 2004.
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