Publications

Found 3 results
Filters: Author is Yajun Ran and Keyword is delays  [Clear All Filters]
2005
Y. Ran, Kondratyev, A., Tseng, K., Watanabe, Y., and Marek-Sadowska, M., Eliminating false positives in crosstalk noise analysis, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 1406 - 1419, 2005.
K. Wang, Ran, Y., Jiang, H., and Marek-Sadowska, M., General skew constrained clock network sizing based on sequential linear programming, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 773 - 782, 2005.
2004
Y. Ran, Kondratyev, A., Watanabe, Y., and Marek-Sadowska, M., Eliminating false positives in crosstalk noise analysis, in Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, 2004, vol. 2, pp. 1192 - 1197 Vol.2.