Publications

Found 3 results
Filters: Author is Chang, D. and Keyword is field programmable gate arrays  [Clear All Filters]
1999
D. Chang and Marek-Sadowska, M., “Partitioning sequential circuits on dynamically reconfigurable FPGAs”, Computers, IEEE Transactions on, vol. 48, pp. 565 -578, 1999.
1997
Y. - L. Wu, Chang, D., Marek-Sadowska, M., and Tsukiyama, S., “Not necessarily more switches more routability [sic.]”, in Design Automation Conference 1997. Proceedings of the ASP-DAC '97. Asia and South Pacific, 1997, pp. 579 -584.
1996
C. - C. Lin, Chang, D., Wu, Y. - L., and Marek-Sadowska, M., “Time-multiplexed routing resources for FPGA design”, in Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996, 1996, pp. 152 -155.