Publications

Found 4 results
Filters: Keyword is SRAM chips  [Clear All Filters]
2012
F. Chen, Mittl, S., Shinosky, M., Swift, A., Kontra, R., Anderson, B., Aitken, J., Wang, Y., Kinser, E., Kumar, M., Wang, Y., Kane, T., Feng, K. D., Henson, W. K., Mocuta, D., and Li, Di-an, “Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues”, in Reliability Physics Symposium (IRPS), 2012 IEEE International, 2012, pp. 6A.4.1 -6A.4.9.
2011
V. S. Nandakumar and Marek-Sadowska, M., “Layout effects in fine grain 3D integrated regular microprocessor blocks”, in Design Automation Conference (DAC), 2011 48th ACM/EDAC/IEEE, 2011, pp. 639 -644.
2006
C. - K. Tsai and Marek-Sadowska, M., “Analysis of process variation's effect on SRAM's read stability”, in Quality Electronic Design, 2006. ISQED '06. 7th International Symposium on, 2006, p. 8 pp. -610.
2004
Y. Ran and Marek-Sadowska, M., “The magic of a via-configurable regular fabric”, in Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on, 2004, pp. 338 - 343.