Analysis of process variation's effect on SRAM's read stability

TitleAnalysis of process variation's effect on SRAM's read stability
Publication TypeConference Paper
Year of Publication2006
AuthorsTsai, C-K, Marek-Sadowska, M
Conference NameQuality Electronic Design, 2006. ISQED '06. 7th International Symposium on
Date Publishedmarch
KeywordsBSIM3v3 model, circuit stability, DC voltage-transfer characteristics, integrated circuit design, logic design, manufacturing process variations, power supply voltage variations, SRAM chips, SRAM read operation, SRAM stability, transistor current model, transistors threshold voltage
AbstractIn this paper we analyze the effect of manufacturing process variations on the SRAM stability in the read operation. We analyze the SRAM's read operation and the DC voltage-transfer characteristics (VTCs). Based on the VTCs, we define the read margin to characterize the SRAM cell's read stability. We calculate the read margin based on the transistor's current model using the BSIM3v3 model. Experimental results show that the read margin accurately captures the SRAM's read stability as a function of the transistors threshold voltage and the power supply voltage variations