Publications

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Filters: Keyword is timing and Author is Chen, L.H.  [Clear All Filters]
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A. Vittal, Chen, L. H., Marek-Sadowska, M., Wang, K. - P., and Yang, S., Crosstalk in VLSI interconnections, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 18, pp. 1817 -1824, 1999.
S
A. Mukherjee, Wang, K., Chen, L. H., and Marek-Sadowska, M., Sizing power/ground meshes for clocking and computing circuit components, in Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings, 2002, pp. 176 -183.