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L. H. Chen, Marek-Sadowska, M., and Brewer, F., “Buffer delay change in the presence of power and ground noise”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 11, pp. 461 -473, 2003.
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C. - C. Lin, Chen, K. - C., and Marek-Sadowska, M., “Logic synthesis for engineering change”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 18, pp. 282 -292, 1999.