Publications

Found 4 results
Filters: Keyword is integrated circuit design and Author is Bo Hu  [Clear All Filters]
2004
B. Hu and Marek-Sadowska, M., “Fine granularity clustering-based placement”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 23, pp. 527 - 536, 2004.
Q. Liu, Hu, B., and Marek-Sadowska, M., “Individual wire-length prediction with application to timing-driven placement”, Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 12, pp. 1004 -1014, 2004.
2003
B. Hu, Watanabe, Y., and Marek-Sadowska, M., “Gain-based technology mapping for discrete-size cell libraries”, in Design Automation Conference, 2003. Proceedings, 2003, pp. 574 - 579.
2001
C. - W. Chang, Hu, B., and Marek-Sadowska, M., “In-place delay constrained power optimization using functional symmetries”, in Design, Automation and Test in Europe, 2001. Conference and Exhibition 2001. Proceedings, 2001, pp. 377 -382.