Title | Individual wire-length prediction with application to timing-driven placement |
Publication Type | Journal Article |
Year of Publication | 2004 |
Authors | Liu, Q, Hu, B, Marek-Sadowska, M |
Journal | Very Large Scale Integration (VLSI) Systems, IEEE Transactions on |
Volume | 12 |
Pagination | 1004 -1014 |
Date Published | oct. |
ISSN | 1063-8210 |
Keywords | annealing refinement stage, clustering netlist, fast placer implementation, individual wire length prediction, integrated circuit design, integrated circuit interconnections, integrated circuit modelling, placement flow, simulated annealing, slack assignment algorithm, timing driven placement |
Abstract | In this paper, we address the problem of individual wire-length prediction and demonstrate its usefulness in timing-driven placement. Many researchers have observed that different placement algorithms produce different individual wire lengths. We postulate that to obtain accurate results, individual wire-length prediction should be coupled with the placement flow. We embed the wire-length prediction into the clustering step of our fast placer implementation (FPI) framework . The predicted wire lengths act as constraints for the simulated annealing refinement stage, which guides the placement toward a solution fulfilling them. Experimental results show that our prediction process yields accurate results without loss of quality and incurs only a small cost in placement effort. We successfully apply the wire-length prediction technique to timing-driven placement. Our new slack assignment algorithm with predicted wire lengths (p-SLA) gives on average an 8% improvement in timing performance compared with the conventional modified zero-slack algorithm (m-ZSA). |
DOI | 10.1109/TVLSI.2004.834234 |