Publications
Found 33 results
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“Delay and area optimization in standard-cell design”, in Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE, 1990, pp. 349 -352.
, “Test-point insertion: scan paths through functional logic”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 17, pp. 838 -851, 1998.
, “Universal Logic Gate For Fpga Design”, in Computer-Aided Design, 1994., IEEE/ACM International Conference on, 1994, pp. 164 -168.
, “Performance study of VeSFET-based, high-density regular circuits”, in ISPD '10: Proceedings of the 19th international symposium on Physical design, 2010, pp. 161–168.
, “Test point insertion: scan paths through combinational logic”, in Design Automation Conference Proceedings 1996, 33rd, 1996, pp. 268 -273.
, “On-chip em-sensitive interconnect structures”, in SLIP '10: Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction, 2010, pp. 43–50.
, “Global Routing for Gate Array”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 3, pp. 298 - 307, 1984.
, “Variation-aware electromigration analysis of power/ground networks”, in Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on, 2011, pp. 571 -576.
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