- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Metrics for characterizing machine learning-based hotspot detection methods
- A study on cell-level routing for VeSFET circuits
- On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
Performance study of VeSFET-based, high-density regular circuits
Title | Performance study of VeSFET-based, high-density regular circuits |
Publication Type | Conference Paper |
Year of Publication | 2010 |
Authors | Yi-Wei Lin, Marek-Sadowska, M, Maly, W |
Conference Name | ISPD '10: Proceedings of the 19th international symposium on Physical design |
Publisher | ACM |
Conference Location | New York, NY, USA |
ISBN Number | 978-1-60558-920-6 |
DOI | 10.1145/1735023.1735062 |