Publications

Found 7 results
Filters: First Letter Of Title is O  [Clear All Filters]
2011
M. Marek-Sadowska, “On old and new routing problems”, in ISPD '11: Proceedings of the 2011 international symposium on Physical design, 2011, pp. 13–20.
2010
Li, Di-an, Marek-Sadowska, M., and Lee, B., “On-chip em-sensitive interconnect structures”, in SLIP '10: Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction, 2010, pp. 43–50.
2007
W. Maly, Yi-Wei Lin, and Marek-Sadowska, M., “OPC-Free and Minimally Irregular IC Design Style”, in Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE, 2007, pp. 954 -957.
2005
K. Wang and Marek-Sadowska, M., “On-chip power-supply network optimization using multigrid-based technique”, Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 24, pp. 407 - 417, 2005.
2003
K. Wang and Marek-Sadowska, M., “On-chip power supply network optimization using multigrid-based technique”, in Design Automation Conference, 2003. Proceedings, 2003, pp. 113 - 118.
2000
Y. - L. Wu, Fan, H., Marek-Sadowska, M., and Wong, C. K., “OBDD minimization based on two-level representation of Boolean functions”, Computers, IEEE Transactions on, vol. 49, pp. 1371 -1379, 2000.
1995
Y. - L. Wu and Marek-Sadowska, M., “Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing”, in Design Automation, 1995. DAC '95. 32nd Conference on, 1995, pp. 568 -573.