OPC-Free and Minimally Irregular IC Design Style

TitleOPC-Free and Minimally Irregular IC Design Style
Publication TypeConference Paper
Year of Publication2007
AuthorsMaly, W, Yi-Wei Lin, Marek-Sadowska, M
Conference NameDesign Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Date Publishedjune
Keywordsdesign for manufacture, IC layout, IC manufacturability, integrated circuit layout, integrated circuit manufacture, layout style, OPC-free IC design, proximity effect (lithography), transistors, VLSI
AbstractAdvancements in IC manufacturing technologies allow for building very large devices with billions of transistors and with complex interactions between them encapsulated in a huge number of design rules. To ease designers' efforts in dealing with electrical and manufacturing problems, regular layout style seems to be a viable option. In this paper we analyze regular layouts in an IC manufacturability context and define their desired properties. We introduce the OPC-free IC design methodology and study properties of cells designed for this layout style that have various degrees of regularity.