On designing universal logic blocks and their application to FPGA design

TitleOn designing universal logic blocks and their application to FPGA design
Publication TypeJournal Article
Year of Publication1997
AuthorsLin, C-C, Marek-Sadowska, M
JournalComputer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Pagination519 -527
Date Publishedmay
KeywordsActel 2, Boolean functions, circuit CAD, CMOS logic circuits, field programmable gate arrays, FPGA design, integrated circuit design, logic CAD, logic function, logic gates, programmable cell, three-input lookup table cells, universal logic blocks, universal logic gate
AbstractWe present a general methodology to determine the logic function of a programmable cell. It is based on the concept of universal logic gate (ULG) that is capable of being configured to a given set of functions. The cells studied here can be configured to the desired functionality by applying input permutation, negation, bridging or constant assignment, or output negation. One application of this technique is to select an appropriate programmable cell structure for FPGA architecture. The Actel 2 and the three-input look-up table cells are studied and compared to the cell that has been designed using the approach described here. Experimental results suggest that the new cell behaves as well as the Actel 2 cell in terms of logic power, but requires substantially less area and wiring overhead