Verifying equivalence of functions with unknown input correspondence

TitleVerifying equivalence of functions with unknown input correspondence
Publication TypeConference Paper
Year of Publication1993
AuthorsCheng, DI, Marek-Sadowska, M
Conference NameDesign Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Date Publishedfeb
KeywordsBoolean functions, equivalence classes, logic design, logic synthesis, logic verification, partial correspondence, partner patterns, signature of variables, unknown input correspondence, verifying equivalence
AbstractIt is pointed out by the authors that most of the methods that tackle the problem of verifying equivalence of two Boolean functions assume that the correspondence of input variables is known. A method that does not require this assumption is proposed. The key to the method is to associate a new signature with each input variable, thereby effectively establishing partial (sometimes total) correspondence between the sets of input variables. The descriptive power of the new signature appears to be very effective