- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Metrics for characterizing machine learning-based hotspot detection methods
- A study on cell-level routing for VeSFET circuits
- On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
A New Accurate and Efficient Timing Simulator
Title | A New Accurate and Efficient Timing Simulator |
Publication Type | Conference Paper |
Year of Publication | 1992 |
Authors | Lin, S, Kuh, ES, Marek-Sadowska, M |
Conference Name | VLSI Design, 1992. Proceedings., The Fifth International Conference on |
Date Published | jan |
Abstract | Not available |
DOI | 10.1109/ICVD.1992.658063 |