- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Metrics for characterizing machine learning-based hotspot detection methods
- A study on cell-level routing for VeSFET circuits
- On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
Interconnect pipelining in a throughput-intensive FPGA architecture
| Title | Interconnect pipelining in a throughput-intensive FPGA architecture |
| Publication Type | Conference Paper |
| Year of Publication | 2001 |
| Authors | Singh, A, Mukherjee, A, Marek-Sadowska, M |
| Conference Name | FPGA '01: Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays |
| Publisher | ACM |
| Conference Location | New York, NY, USA |
| ISBN Number | 1-58113-341-3 |
| DOI | 10.1145/360276.360323 |
