- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Efficient approach to early detection of lithographic hotspots using machine learning systems and pattern matching
- Low power, high throughput network-on-chip fabric for 3D multicore processors
- Rapid layout pattern classification
Switch box routing: a retrospective
| Title | Switch box routing: a retrospective |
| Publication Type | Journal Article |
| Year of Publication | 1992 |
| Authors | Marek-Sadowska, M |
| Journal | Integr. VLSI J. |
| Volume | 13 |
| Pagination | 39–65 |
| ISSN | 0167-9260 |
| DOI | 10.1016/0167-9260(92)90017-S |
