- Vertical Slit Field Effect Transistor in ultra-low power applications
- Can pin access limit the footprint scaling?
- A Low Energy Network-on-Chip Fabric for 3-D Multi-Core Architectures
- Investigation of emerging middle-of-line poly gate-to-diffusion contact reliability issues
- Metrics for characterizing machine learning-based hotspot detection methods
- A study on cell-level routing for VeSFET circuits
- On Cell Layout-Performance Relationships in VeSFET-Based, High-Density Regular Circuits
Switch box routing: a retrospective
Title | Switch box routing: a retrospective |
Publication Type | Journal Article |
Year of Publication | 1992 |
Authors | Marek-Sadowska, M |
Journal | Integr. VLSI J. |
Volume | 13 |
Pagination | 39–65 |
ISSN | 0167-9260 |
DOI | 10.1016/0167-9260(92)90017-S |