| Title | Power gating scheduling for power/ground noise reduction |
| Publication Type | Conference Paper |
| Year of Publication | 2008 |
| Authors | Jiang, H, Marek-Sadowska, M |
| Conference Name | Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE |
| Date Published | june |
| Keywords | current densities, current density, decap configuration, decap distribution, GA approach, gated blocks, genetic algorithms, integrated circuit noise, leakage currents, leakage power, power gating scheduling, power grid, power grids, power supply circuits, power/ground noise reduction, simulation-based method, wake-up order, wake-up time constraint |
| Abstract | Power gating is a technique for efficiently reducing leakage power by disconnecting idle blocks from the power grid. When gated blocks are woken up, large amounts of switching currents are drawn in a short period of time that may introduce severe noise on the power delivery mesh. In this paper, we propose a GA-based approach to schedule power gating considering power/ground noise. We introduce a simulation-based method to accurately and efficiently estimate the worst case noise, taking all the current sources, inductance and decaps' effects into consideration. We also present an incremental scheduling procedure considering the dynamic changes of decap configuration. Experimental results show that by optimally scheduling the wake-up order under time constraints, our technique can reduce noise up to 50% compared to waking gated blocks simultaneously. The quality of results depends upon the total wake-up time constraint, locations of gated blocks, current densities of gated blocks, and decap distribution. |
