Electromigration and voltage drop aware power grid optimization for power gated ICs

TitleElectromigration and voltage drop aware power grid optimization for power gated ICs
Publication TypeConference Paper
Year of Publication2007
AuthorsTodri, A, Chang, S-C, Marek-Sadowska, M
Conference NameLow Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
Date Publishedaug.
Keywordscurrent density, electromigration, electromigration constraints, idle blocks, leakage power reduction, power gated IC, power gating configuration, power grids, power integrated circuits, voltage drop aware power grid optimization
AbstractPower gating is an efficient technique for reducing leakage power by disconnecting idle blocks from power supply. Gated blocks cause changes in current densities on the grid. Even in DC conditions for some power gating configuration (PGC), current densities in some branches may increase to the extent of violating electromigration (EM) constraints. The existing DC methods optimize the grid under voltage drop (IR) and EM constraints for a single configuration of blocks. We analyze the effects of power gating and develop a grid sizing algorithm to satisfy all reliability constraints for multiple PGCs with only a small increase in area.
DOI10.1145/1283780.1283866